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DMG564H2
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DMG564H2

SKU: DMG564H2
DMG564H2 Transistor Silicon Pre-Biased-NPN - PNP CASE: SMini6-F3-B MAKE: Pacer Technology
Datasheet
DMG564H2 Datasheet
Product specifications
Type Transistor Silicon Pre-Biased-NPN - PNP
Case SMini6-F3-B
Manufacturer Pacer Technology
Polarity Pre-Biased-NPN*PNP
Maximum Collector Power Dissipation (Pc) 0.15 W
Maximum Collector-Base Voltage |Vcb| 50 V
Maximum Collector-Emitter Voltage |Vce| 50 V
Maximum Collector Current |Ic max| 0.1 A
Max. Operating Junction Temperature (Tj) 150 °C
Forward Current Transfer Ratio (hFE), MIN 80
SMD Transistor Code T3
Built in Bias Resistor R1 4.7 kOhm
Built in Bias Resistor R2 47 kOhm
Typical Resistor Ratio R1/R2 0.1
SKU 1429544
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